?002 fairchild semiconductor corporation rfp2n08l, RFP2N10L rev. b rfp2n08l, RFP2N10L 2a, 80v and 100v, 1.050 ohm, logic level, n-channel power mosfets the rfp2n08l and RFP2N10L are n-channel enhancement mode silicon gate power ?ld effect transistors speci?ally designed for use with logic level (5v) driving sources in applications such as programmable controllers, automotive switching, and solenoid drivers. this performance is accomplished through a special gate oxide design which provides full rated conductance at gate biases in the 3v to 5v range, thereby facilitating true on-off power control directly from logic circuit supply voltages. formerly developmental type ta0924. features 2a, 80v and 100v ? ds(on) = 1.050 ? design optimized for 5v gate drives can be driven directly from qmos, nmos, ttl circuits compatible with automotive drive requirements soa is power dissipation limited nanosecond switching speeds linear transfer characteristics high input impedance majority carrier device related literature - tb334 ?uidelines for soldering surface mount components to pc boards symbol packaging jedec to-220ab ordering information part number package brand rfp2n08l to-220ab rfp2n08l RFP2N10L to-220ab RFP2N10L note: when ordering, include the entire part number. g d s gate drain (flange) source drain data sheet january 2002
?002 fairchild semiconductor corporation rfp2n08l, RFP2N10L rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d rfp2n08l RFP2N10L units drain to source voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ds 80 100 v drain to gate voltage (r gs = 1m ?) (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dgr 80 100 v continuous drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d 22a pulsed drain current (note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 55a gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gs 10 10 v maximum power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .p d 25 25 w derate above 25 o c. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 0.2 w/ o c operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 150 -55 to 150 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t pkg 300 260 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. t j = 25 o c to 125 o c. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss v gs = 0v, i d = 250 a rfp2n08l 80 - - v RFP2N10L 100 - - v gate to threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 - 2.0 v gate to source leakage i gss v gs = 10v, v ds = 0v - - 100 na zero to gate voltage drain current i dss v ds = rated bv dss , v gs = 0v - - 1.0 a v ds = 0.8 x rated bv dss , v gs = 0v, t c = 125 o c- - 25 a drain to source on voltage (note 2) v ds(on) i d = 2a, v gs = 5v - - 2.1 v drain to source on resistance (note 2) r ds(on) i d = 2a, v gs = 5v, (figures 6, 7) - - 1.050 ? turn-on delay time t d(on) i d = 2a, v dd = 50v, r g = 6.25 ? , r l = 25 ? , v gs = 5v (figures 10, 11, 12) -1025ns rise time t r -1545ns turn-off delay time t d(off) -2545ns fall time t f -2025ns input capacitance c iss v gs = 0v, v ds = 25v, f = 1.0mhz (figure 9) - - 200 pf output capacitance c oss - - 80 pf reverse transfer capacitance c rss - - 35 pf thermal resistance junction to case r jc --5 o c/w source to drain diode speci?ations parameter symbol test conditions min typ max units source to drain diode voltage (note 2) v sd i sd = 2a - - 1.4 v reverse recovery time t rr i sd = 2a, di sd /dt = 50a/ s - 100 - ns notes: 2. pulse test: pulse width 300 s, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. rfp2n08l, RFP2N10L
?002 fairchild semiconductor corporation rfp2n08l, RFP2N10L rev. b typical performance curves unless otherwise speci?d figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. forward bias safe operating area figure 4. saturation characteristics figure 5. transfer characteristics figure 6. drain to source on resistance vs drain current t c , case temperature ( o c) power dissipation multiplier 0 0 25 50 75 100 150 0.2 0.4 0.6 0.8 1.0 1.2 125 0 25 50 75 100 125 150 t c , case temperature ( o c) i d , drain current (a) 2.5 1.5 1.0 0.5 2.0 v ds , drain to source voltage (v) 10 0.01 10 1 i d , drain current (a) 10 2 1 RFP2N10L 0.1 operation in this area limited by r ds(on) t j = max rated, t c = 25 o c rfp2n08l 10 3 v ds, drain to source voltage (v) i d , drain current (a) 04610 2 5 7 3 8 6 4 2 8 1 0 13579 pulse duration = 80 s t c = 25 o c v gs = 4.0v v gs = 10v v gs = 5.0v v gs = 2.0v v gs = 3.0v duty cycle = 0.5% max 1346 2 4 i ds(on) , drain to source current (a) v gs , gate to source voltage (v) 6 2 8 5 3 1 5 v ds = 15v pulse duration = 80 s 0 7 t c = -40v t c = 25v t c = 125v t c = -40v t c = 125v duty cycle = 0.5% max 2 i d, drain current (a) 1 0 2 0 1.5 r ds(on) , drain to source 1 0.5 34 t c = -40v 10 v gs = 5v pulse duration = 80 s 56789 t c = 25v t c = 125v on resistance ( ? ) duty cycle = 0.5% max rfp2n08l, RFP2N10L
?002 fairchild semiconductor corporation rfp2n08l, RFP2N10L rev. b figure 7. normalized drain to source on resistance vs junction temperature figure 8. normalized gate to threshold vs junction temperature figure 9. capacitance vs drain to source voltage note: refer to fairchild application notes an7254 and an7260. figure 10. normalized switching waveforms for constant gate current test circuit and waveforms figure 11. switching time test circuit figure 12. resistive switching waveforms typical performance curves unless otherwise speci?d (continued) -50 t j , junction temperature ( o c) 2.0 100 0 50 150 200 1.0 1.5 0.5 i d = 2a, v gs = 5v pulse duration = 80ms normalized drain to source on resistance duty cycle = 0.5% max -50 t j , junction temperature ( o c) normalized gate to 1.0 0.5 0 0 200 threshold voltage 50 100 150 1.5 2.0 i d = 250 a v ds = v gs 0 203040 70 c, capacitance (pf) v ds, drain to source voltage (v) 240 200 160 0 10 120 80 c iss c rss c oss 40 50 60 v gs = 0v, f = 0.1mhz c iss = c gs + c gd c rss = c gd c oss c ds + c gd 100 75 25 0 20 i g ref () i g act () ------------------------ - t, time (ms) 80 i g ref () i g act () ------------------------ - 10 8 6 2 0 v ds , drain to source voltage (v) v gs , gate to source voltage (v) v dd = bv dss v dd = 0.75 bv dss v dd = 0.50 bv dss v dd = 0.25 bv dss descending order: r l = 50 ? , v gs = 5v i g(ref) = 0.094ma 50 4 drain source voltage plateau voltages in source voltage gate v gs r l r g dut + - v dd t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0 rfp2n08l, RFP2N10L
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